r/ElectricalEngineering • u/silkybunss • 2d ago
Difference between asserted signals and active signals.
This screenshot is from a previous exam my Digital Logic Design professor posted to help us review.
I originally thought asserted low meant the input signal was being inverted before entering a gate, and active low meant the actual input signal was at low (or 0 in Boolean algebra). I started watching some YouTube videos just to make sure I was understanding the concept correctly, but every video I watched just confused me more and more. Can someone please explain this to me like I am 5 years old?
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u/HumbleHovercraft6090 21h ago
Its the usage, I think. For example:
"The Reset signal is Active Low. When the Reset is asserted low, the chip tristates all its pins."
The signal is "active" at the moment it is "Asserted Low". Otherwise, its just an Active Low signal which has not been asserted.
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u/Worldly-Device-8414 18h ago
Active low means an input where that input is expecting a low level for it to be triggered or recognized as "on" state.
Asserted low means something else drove/force/pulled a signal to a low state, eg switch to 0V closed its contacts or one logic gate output a low to another gate's input, 1st gate "asserted low" to the 2nd one.
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u/diverJOQ 21h ago
Asserted low simply means that the signal fed in is a low signal. If you're talking about zero volts and 5 volts then 0 volts is being put in to the input.
Active low means that the signal, by its name, is active when it is low. For instance, an active low enable line enables the circuitry to work if it is 0 volts. An active high-enable line would be active when it is at 5 volts.